What's happening

TSMC is reportedly preparing to raise prices for its 3nm process node by as much as 15% in the second half of 2026, with an additional 5%–10% increase under consideration for 2027, according to TrendForce data published May 27, 2026. The anticipated hikes come as demand for advanced-node capacity has shifted materially away from its historical base in smartphone system-on-chips toward AI server accelerators and application-specific integrated circuits (ASICs) commissioned by hyperscale cloud providers. Clients identified as driving this demand include NVIDIA, AMD, Google, and AWS.

Despite capacity expansion at the 3nm node — monthly wafer output rose from approximately 130,000 units in early 2026 to roughly 160,000–175,000 wafers in Q2 2026 — the incremental supply has not kept pace with accelerating AI-driven orders, tightening utilization rates and reinforcing TSMC's pricing leverage. TSMC Chairman C. C. Wei has acknowledged the intensity of the demand environment, stating, "We're already working very hard." The company's annual shareholder meeting, scheduled for June 4, is expected to draw significant attention to AI demand trends and TSMC's advanced process roadmap.

Why it matters for markets

TSMC's 70.4% share of the global foundry market in Q4 2025 means that pricing decisions at its leading-edge nodes reverberate across virtually the entire advanced semiconductor supply chain. A 15% increase in 3nm wafer costs represents a direct input cost escalation for any fabless designer relying on that node, with the magnitude of the impact determined by each company's wafer volumes, product mix, and ability to pass costs downstream. For AI accelerator vendors, where 3nm and adjacent nodes underpin the most competitive products, the pricing shift arrives at a moment when their own customers — hyperscale data center operators — are committing to multi-year capital expenditure cycles.

The potential for a further 5%–10% hike in 2027 introduces a compounding cost trajectory that chip designers will need to factor into product roadmaps and pricing structures that are typically set 12–18 months in advance. For TSMC itself, the pricing dynamic is straightforwardly accretive to revenue per wafer, assuming demand holds at current levels. The company carries a market capitalization of approximately $2.20 trillion and reported revenue of $4.10 trillion, giving it the scale to absorb capacity investment while extracting higher per-unit returns from constrained advanced nodes.

The structural shift in demand composition — from consumer-facing smartphone SoCs toward AI infrastructure silicon — also has implications for capacity allocation. Cloud providers and ASIC developers tend to place larger, longer-duration orders than consumer electronics manufacturers, which can reduce scheduling flexibility for other customers and further concentrate pricing power at the foundry level.

Sectors and assets to watch

The primary tickers directly implicated are TSM, NVDA, and AMD. TSMC (TSM), as the sole source of the pricing action, sits at the center of the development; its 3nm capacity expansion and the reported pricing trajectory will be a focal point at the June 4 shareholder meeting. NVIDIA (NVDA), with a market capitalization of $5.19 trillion and revenue of $253.49 billion, is among the named customers driving 3nm and advanced-node demand through its AI data center GPU lines, including the H100 and Blackwell product families. AMD (AMD), with a market capitalization of $844.80 billion and revenue of $37.45 billion, is similarly identified as a demand driver through its Instinct accelerator line and EPYC server processors, both of which compete for leading-edge foundry capacity.

Beyond these three primary tickers, the pricing dynamic has broader implications for the ASIC design ecosystem. Google and AWS, both named in the sourced reporting as contributors to 3nm demand through custom silicon programs, are not publicly traded pure-play semiconductor entities but represent significant indirect exposure. Foundry peers and capacity alternatives operating at less advanced nodes are unlikely to serve as direct substitutes for 3nm workloads, given the performance and power-efficiency requirements of current AI accelerator architectures.

What to watch next

The most immediate catalyst for additional clarity is TSMC's annual shareholder meeting on June 4, 2026, where Chairman C. C. Wei and management are expected to address AI demand conditions, capacity utilization at advanced nodes, and the company's forward pricing posture. Observers should monitor whether TSMC provides quantitative guidance on 3nm capacity additions beyond the Q2 2026 range of 160,000–175,000 wafers per month, any formal confirmation of the reported pricing adjustments, and how major customers — particularly NVIDIA and AMD — characterize input cost trends in their own subsequent earnings communications. The 2027 pricing window of 5%–10% remains a reported expectation rather than a confirmed commitment, and its realization will depend on whether AI infrastructure demand sustains its current trajectory through the second half of 2026.